The invention relates generally to common-mode detection circuitry, and more particularly a common-mode detection circuit having cross-coupled compensation circuitry for improving the linearization of a measureds common-mode signal derived from two complementary differential signals.
Differential signaling is fast becoming an extremely important form of data transmission. Based on the general concept of processing a quantity comprising the difference between two complementary signals V2 and V1, the technique minimizes noise degradation by essentially rejecting signal components common to the complementary signals, often referred to as the common-mode voltage Vcm. This allows for the propagation of very high speed digital signals having relatively small voltage swings with minimal signal distortion.
One type of differential signaling technique is defined by IEEE-1394, known in one form under the trademark FIREWIRE(copyright). Generally, the technology utilizes a 100/200/400 Mbit/sec serial protocol that codes changing values of the differential common-mode voltage to indicate the signal data rate in Mbit/sec. The protocol is ideal for interfacing computers to video equipment for frame-grabbing and editing applications.
FIG. 1 illustrates a FIREWIRE(copyright) waveform with two values of the common-mode voltage Vcm1 and Vcm2. The common-mode voltage Vcm1 might represent, for example, 50 Mbit/sec, while the voltage Vcm2 might represent 100 Mbit/sec. As shown, the common-mode voltage closely approximates the average value of the input differential signals Vx1, Vy1, and Vx2, Vy2. Thus, to detect and measure the common-mode voltage level, one merely needs to derive the median or average value of the input differential signals.
In general, measuring or detecting the average value between two signals is often realized by implementing straightforward components. For example, as shown in FIG. 2A, to measure the average voltage between two voltages Vx and Vy, a voltage divider comprising a pair of equal resistors R may be implemented. The measured value, Vm, satisfies the relationship (Vx+Vy)/2, the average voltage. A similar approach may be used for current detection using a straightforward current divider scheme.
Unfortunately, in some instances, when the straightforward components described above are implemented in sensitive electronic circuitry, such as the pin electronics of a semiconductor tester, and more particularly a differential comparator, the conventional averaging circuit may undesirably load both inputs. In an effort to minimize loading effects, those skilled in the art have proposed buffering the inputs with active buffer amplifiers 10 and 12 to isolate the divider from the inputs, as shown in FIG. 2B.
While the buffered input proposal noted above generally solves the loading problem, in some circumstances, the inventor has discovered that the derived output experiences a nonlinear relationship with respect to the differential signal inputs. The problem appears pronounced when the differential inputs comprise a wide range of high, Vh, and low, Vl, input differential signals.
For bipolar transistor implementations of the buffered input proposal, the nonlinearities often arise because of changing values in the base-to-emitter voltages, Vbe (not shown), of both buffers 10 and 12 in response to the differential high and low signal inputs Vh and Vl. For example, if Vx is much higher than Vy, virtually all of the current will flow through the first buffer 10, resulting in the second buffer 12 shutting down, and imbalancing the voltage at each input of the divider, correspondingly affecting the detected average voltage at Vm.
What is needed and heretofore unavailable is a common-mode detection circuit for measuring the common-mode signal associated with a differential signal that avoids the nonlinearities inherent with active buffer amplifiers to maintain a constant output with respect to a wide range of differential input signal values. Moreover, the need exists for the implementation of such a circuit in a high-speed and high-accuracy semiconductor tester. The common-mode detection circuit of the present invention satisfies these needs.
The common-mode detection circuit of the present invention provides high accuracy semiconductor device testing for high bandwidth applications while minimizing nonlinear effects. This correspondingly results in higher tester accuracy and performance.
To realize the foregoing advantages, the invention in one form comprises a common-mode detection circuit for measuring a common-mode signal between two complementary signals. The common-mode detection circuit includes a first signal divider circuit and a linearizer. The signal divider circuit includes a pair of impedances coupled to define a measurement node and respective first and second inputs. The divider further includes a pair of active buffer amplifiers having respective first and second outputs for coupling to the signal divider first and second inputs. The linearizer includes respective first and second inputs cross-coupled to the respective second and first buffer amplifier outputs and is operative to maintain both of the buffer amplifiers in a relatively constant operational state.
In another form, the invention comprises a method of measuring the common-mode signal between two complementary signals. The method includes the steps of buffering the complementary signal values through respective first and second amplifiers; dividing the summed values of the complementary signals across a signal divider disposed between the buffer amplifiers; and linearizing the divided signal by maintaining the buffer amplifiers in a substantially constant operational state.
Other features and advantages of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.